1. Field of the Invention
The present invention relates generally to engineered buses. More specifically, the present invention relates generally to a method to save bus switching power and reduce noise in an engineered bus.
2. Description of the Related Art
Multiprocessors are used today to provide better performance at lower cost. Many commercially available multiprocessor systems are based on a shared memory and shared bus architecture. These multiprocessor systems have a relatively straightforward implementation since they are an extension of the uni-processor bus system. The multiprocessor systems' globally shared memory and consistency mechanisms give a programming model that is very similar to systems of cooperating processes on uni-processors.
One limitation of shared bus multiprocessors is the bandwidth of the bus, which limits the number of processors that can be connected to the same memory, and thus the performance of the system. One solution to the bus bandwidth problem is to increase the speed of the bus, which is not always easy because of technology limitations. Another solution to the bus bandwidth problem uses more wires to connect to the memory, such as wide buses or multiple buses. For a given technology, more wires provide more bandwidth, but solution is not obvious as to the best way to connect the wires because of complications such as caches, code sharing, and system complexity.
Multiple buses are more complex to implement, but they reduce contention because of multiple paths to memory and more wires for control and addresses. Wide buses are simpler to build but they provide only one path to memory. A wide bus may be any bus that is over 64-bits wide. Processor chips that implement long wide buses burn power and reduce noise every time the bus switches, whether or not the data on the bus is used or discarded. A long wide bus is a bus that runs a particularly long distance, such as 6 mm, and is over 64-bits wide. To save power and reduce noise, the bus needs to avoid toggling and instead be held in a known logical state.